ARITH 2025 Keynotes

Arithmetic questions in Fully Homomorphic Encryption

Anamaria Costache1

Speaker

1 is an associate professor at the Norwegian University of Science and Technology.

Fully Homomorphic Encryption (FHE) is a type of encryption that allows to compute on encrypted data. First proposed as a concept in 1978, the construction of such a primitive remained an open problem for nearly three decades, until Gentry proposed the first construction in 2009. Since then, many improvements have appeared and we are now beginning to see the first deployments of FHE in the industry.

This talk aims to present the most important arithmetic questions in FHE. We will begin by giving a general introduction to FHE and motivate its use. Then, we will dive into a more technical presentation, showing how to construct an FHE scheme. The aim of the talk is to give an overview of the arithmetic structures considered in FHE, both in terms of data types supported, as well as to highlight some optimisation algorithms that can be interesting to the ARITH community, such as the use of the Residue Number System (RNS) in FHE to accelerate computations. Ultimately, we hope to present and highlight areas of research that are of interest to both the cryptographic and ARITH communities.

Application-Specific Arithmetic

Florent de Dinechin2 and Martin Kumm3

Speaker
 Speaker

2 is a professor at INSA-Lyon, where he teaches computer architecture and compilers. His main research interests are computer arithmetic, FPGAs, and elementary functions.

3 is a professor at Fulda University of Applied Sciences. His research interest is computer arithmetic and its optimization with particular emphasis on FPGAs.

Together, they manage the FloPoCo project and co-authored the 2024 book "Application-Specific Arithmetic: Computing Just Right for the Reconfigurable Computer and the Dark Silicon Era".

Mainstream microprocessors have to be universal and versatile, and this is reflected in the arithmetic operations they support in hardware. However they are increasingly being complemented by hardware accelerators customized to very specific algorithms. In those accelerators, the arithmetic operators do not need to be versatile nor universal, they need to do one thing for one application, and do it well (according to the metrics of the application).

This talk will survey the challenges and opportunities of designing such application-specific arithmetic hardware. Any precision may be useful, any number encoding, but also any operation or function, provided an efficient circuit can be designed for it. To address this overwhelming freedom, we will review some of the key methodologies and tools that allow a designer to build and compose application-specific operators.

Symposium at a glance

Time (UTC-6)

Monday May 5th, 2025

Tuesday May 6th, 2025

Wednesday May 7th, 2025
9:00 to 9:30 Welcome Session 4: Arithmetic Operations (Chair: TBD)

  • Experimental Software and Hardware Evaluation of Ad-Hoc Constant Division Routines
    Frédéric Pétrot

  • Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator
    Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin

  • Implementation Evaluation of Fixed-Point Multipliers for Complex Numbers
    Per Larsson-Edefors, Erik Börjeson

  • Generic Modulo-(2^n±δ) Addition Algorithm via Two-Valued Digit Encoding
    Saeid Gorgin, Amirhossein Sadr, Dara Rahmati, Jungrae Kim

 Session 6: Floating-Point and Error Analysis (Chair: TBD)

  • Correct Rounding in Double Extended Precision
    Sélène Corbineau, Paul Zimmermann

  • Rigorous Error Analysis for Logarithmic Number Systems
    Thanh Nguyen, Alexey Solovyev, Ganesh Gopalakrishnan, Mark Arnold

  • On Stochastic Rounding with Few Random Bits
    Andrew Fitzgibbon

  • FastTwoSum Revisited
    Claude-Pierre Jeannerod, Paul Zimmermann
9:30 to 11:00 Session 1: AI and Arithmetic (Chair: TBD)

  • An Empirical Study of Microscaling Formats for Low-Precision LLM Training
    Hanmei Yang, Summer Deng, Amit Nagpal, Maxim Naumov, Mohammad Janani, Tongping Liu, Hui Guan

  • Hardware-Aware Training for Multiplierless Convolutional Neural Networks
    Rémi Garcia, Léo Pradels, Silviu-Ioan Filip, Olivier Sentieys

  • Range Extension with Supernormals for Mixed-Precision 8-bit DNN Training
    Shing Wai Pun, Bozhang Bao, Silviu-Ioan Filip, Guy Lemieux
11:00 to 11:30 Break
11:30 to 12:30 1st Keynote Talk:
Arithmetic questions in Fully Homomorphic Encryption
by Anamaria Costache 		2nd Keynote Talk:
Application-Specific Arithmetic
by Florent de Dinechin and Martin Kumm 		Session 7: Verification (Chair: TBD)

  • Robust, End-to-end Correctness Proofs of Industrial Divide and Square Root RTL Designs
    Sol Swords, Cuong Chau

  • Formal Verification of the IEEE P3109 Standard for Binary Floating-point Formats for Machine Learning
    Christoph M. Wintersteiger
12:30 to 2:00 Lunch
2:00 to 3:30 Session 2: Hardware Operators (Chair: TBD)

  • Trailing-ones Anticipation for Reducing Latency of the Rounding Incrementer in FP FMA Units
    Toru Koizumi, Ryota Shioya, Takuya Yamauchi, Tomoya Adachi, Ken Namura, Jun Makino

  • Hardware Fixed-Point 2D and 3D norms
    Romain Bouarah, Florent de Dinechin

  • VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers
    Run Wang, Gamze Islamoglu, Andrea Belano, Viviane Potocnik, Francesco Conti, Angelo Garofalo, Luca Benini
Steering Committee meeting (2:00-3:00) Demo (2:30-3:00)
Social Event
3:30 to 4:00 Break
4:00 to 5:30 Session 3: Scientific Computing and Arithmetic (Chair: TBD)

  • On the Flop and Flap Counts of the 2,8-Split-Radix FFT
    Paul Caprioli

  • Fast Basecases for Arbitrary-size Multiplication
    Albin Ahlbäck, Fredrik Johansson

  • Evaluation of Bfloat16, Posit, and Takum Arithmetics in Sparse Linear Solvers
    Laslo Hunhold, James Quinlan

 Session 5: Numerical Tools and Software (Chair: TBD)

  • Rounding Error Statistics as Numerics Signature
    Ping Tak Peter Tang

  • Accurate Floating-Point Debugging without Oracles
    Bhargav Kulkarni, Pavel Panchekha

  • EXCVATE: Spoofing Exceptions and Solving Constraints to Test Exception Handling in Numerical Libraries
    Jackson Vanover, James Demmel, Xiaoye Sherry Li, Cindy Rubio-González
5:30 to 6:30 Panel: Correctly Rounded Functions Banquet

Detailed Program - Subject to Change

All times are displayed in Mountain Daylight Time (UTC-6)

Sunday May 4th, 2025
5:00 pm to 7:00 pm Welcome Reception & Registration
Join us for a cocktail reception. Badges will be available for pickup. Please note that no scientific sessions will be held on Sunday May 4th. On-cite registration will be available.

Monday May 5th, 2025
9:00 to 9:30 Welcome
9:30 to 11:00 Session 1: AI and Arithmetic (Chair: TBD)

  • An Empirical Study of Microscaling Formats for Low-Precision LLM Training
    Hanmei Yang, Summer Deng, Amit Nagpal, Maxim Naumov, Mohammad Janani, Tongping Liu, Hui Guan

  • Hardware-Aware Training for Multiplierless Convolutional Neural Networks
    Rémi Garcia, Léo Pradels, Silviu-Ioan Filip, Olivier Sentieys

  • Range Extension with Supernormals for Mixed-Precision 8-bit DNN Training
    Shing Wai Pun, Bozhang Bao, Silviu-Ioan Filip, Guy Lemieux
11:00 to 11:30 Break
11:30 to 12:30 1st Keynote Talk
Arithmetic questions in Fully Homomorphic Encryption
by Anamaria Costache
12:30 to 2:00 Lunch
2:00 to 3:30 Session 2: Hardware Operators (Chair: TBD)

  • Trailing-ones Anticipation for Reducing Latency of the Rounding Incrementer in FP FMA Units
    Toru Koizumi, Ryota Shioya, Takuya Yamauchi, Tomoya Adachi, Ken Namura, Jun Makino

  • Hardware Fixed-Point 2D and 3D norms
    Romain Bouarah, Florent de Dinechin

  • VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers
    Run Wang, Gamze Islamoglu, Andrea Belano, Viviane Potocnik, Francesco Conti, Angelo Garofalo, Luca Benini
3:30 to 4:00 Break
4:00 to 5:30 Session 3: Scientific Computing and Arithmetic (Chair: TBD)

  • On the Flop and Flap Counts of the 2,8-Split-Radix FFT
    Paul Caprioli

  • Fast Basecases for Arbitrary-size Multiplication
    Albin Ahlbäck, Fredrik Johansson

  • Evaluation of Bfloat16, Posit, and Takum Arithmetics in Sparse Linear Solvers
    Laslo Hunhold, James Quinlan
5:30 to 6:30 Panel: Correctly Rounded Functions

Tuesday May 6th, 2025
9:00 to 11:00 Session 4: Arithmetic Operations (Chair: TBD)

  • Experimental Software and Hardware Evaluation of Ad-Hoc Constant Division Routines
    Frédéric Pétrot

  • Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator
    Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin

  • Implementation Evaluation of Fixed-Point Multipliers for Complex Numbers
    Per Larsson-Edefors, Erik Börjeson

  • Generic Modulo-(2^n±δ) Addition Algorithm via Two-Valued Digit Encoding
    Saeid Gorgin, Amirhossein Sadr, Dara Rahmati, Jungrae Kim
11:00 to 11:30 Break
11:30 to 12:30 2nd Keynote Talk
Application-Specific Arithmetic
by Florent de Dinechin and Martin Kumm
12:30 to 2:00 Lunch
2:00 to 3:00 Steering Committee meeting
2:30 to 3:00 Demo
3:00 to 4:00 Break
4:00 to 5:30 Session 5: Numerical Tools and Software (Chair: TBD)

  • Rounding Error Statistics as Numerics Signature
    Ping Tak Peter Tang

  • Accurate Floating-Point Debugging without Oracles
    Bhargav Kulkarni, Pavel Panchekha

  • EXCVATE: Spoofing Exceptions and Solving Constraints to Test Exception Handling in Numerical Libraries
    Jackson Vanover, James Demmel, Xiaoye Sherry Li, Cindy Rubio-González
5:30 Banquet

Wednesday May 7th, 2025
9:00 to 11:00 Session 6: Floating-Point and Error Analysis (Chair: TBD)

  • Correct Rounding in Double Extended Precision
    Sélène Corbineau, Paul Zimmermann

  • Rigorous Error Analysis for Logarithmic Number Systems
    Thanh Nguyen, Alexey Solovyev, Ganesh Gopalakrishnan, Mark Arnold

  • On Stochastic Rounding with Few Random Bits
    Andrew Fitzgibbon

  • FastTwoSum Revisited
    Claude-Pierre Jeannerod, Paul Zimmermann
11:00 to 11:30 Break
11:30 to 12:30 Session 7: Verification (Chair: TBD)

  • Robust, End-to-end Correctness Proofs of Industrial Divide and Square Root RTL Designs
    Sol Swords, Cuong Chau

  • Formal Verification of the IEEE P3109 Standard for Binary Floating-point Formats for Machine Learning
    Christoph M. Wintersteiger
12:30 to 2:00 Lunch
2:00 to 6:00 Social Event